Chapter 9: TOOLS

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9-9: Silicon Compiler

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Electric has a silicon compiler called QUISC (the Queen's University Interactive Silicon Compiler). It is a powerful tool that can do placement and routing of standard cells from a structural VHDL description. The VHDL is compiled into a netlist which is then used to drive placement and routing. Also, because Electric is able to generate VHDL from a schematic, the silicon compiler can hide the VHDL and produce layout directly from schematics.

Be warned that the silicon compiler is rather old, and so it produces layout that alternates standard cell rows and routing rows. Modern silicon compilers use 3 and 4 metal processes to route over the standard cells, but this system does not.

The VHDL description is normally placed in the "vhdl" view of a cell. It can be created and edited entirely inside of Electric, or it can be read from disk by using the Read Text Cell... command of the Cells menu. See Section 4-10 for more on text editing. Automatic generation of VHDL from layout is done with the Make VHDL View command of the View menu.

Once the VHDL is created, it is compiled into a netlist and read into the silicon compiler. The netlist is normally placed in the "netlist-quisc-format" view of a cell. If the netlist is too cumbersome to retain in memory, it may be kept on disk by using the VHDL Options... subcommand of the VHDL Compiler command of the Tools menu and unchecking the "Netlist stored in cell" item. The "VHDL stored in cell" check controls the placement of VHDL text in a similar way.

When generating a schematic or VHDL description, it is important to know what primitives are available in the standard cell library. Electric comes with a CMOS cell library in the MOSIS CMOS ("mocmos") technology. This library is not correct, and exists only to illustrate the Silicon Compiler. These component declarations are available:

component and2 port(a1, a2 : in bit; y : out bit); end component;
component and3 port(a1, a2, a3 : in bit; y : out bit); end component;
component and4 port(a1, a2, a3, a4 : in bit; y : out bit); end component;
component inverter port(a : in bit; y : out bit); end component;
component nand2 port(a1, a2 : in bit; y : out bit); end component;
component nand3 port(a1, a2, a3 : in bit; y : out bit); end component;
component nand4 port(a1, a2, a3, a4 : in bit; y : out bit); end component;
component nor2 port(a1, a2 : in bit; y : out bit); end component;
component nor3 port(a1, a2, a3 : in bit; y : out bit); end component;
component nor4 port(a1, a2, a3, a4 : in bit; y : out bit); end component;
component or2 port(a1, a2 : in bit; y : out bit); end component;
component or3 port(a1, a2, a3 : in bit; y : out bit); end component;
component or4 port(a1, a2, a3, a4 : in bit; y : out bit); end component;
component rdff port(d, ck, cb, reset : in bit; q, qb : out bit); end component;
component xor2 port(a1, a2 : in bit; y : out bit); end component;

To use the silicon compiler, simply run the subcommands in the Silicon Compiler command of the Tools menu. The commands are organized in the menu so that, when run sequentially downward, they perform the compilation process. The steps are as follows:

The last subcommand in the Silicon Compiler command is Issue Special Instructions..., which does not normally need to be used. However, the silicon compiler system is so extensive that advanced users may wish to use it. After issuing this command, any sequence of silicon compiler instructions may be typed. Use the "Cancel" button to return to Electric.


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