public abstract class NetscanGeneric extends JtagTester
hw_*
must be overridden to provide hardware-specific control
of the JTAG tester.
At most one Corelis JTAG tester is supported per program, because a) the vendor-supplied interface methods are all static access and b) the one- and four-port libraries have naming conflicts and so cannot be loaded at the same time.
Shifting data in and out should instead be performed using
ChainControl
. All of the methods could have been static, but we made
them non-static to allow device-independent JTAG control.
Modifier and Type | Field and Description |
---|---|
static short |
DEFAULT_STOP_STATE
Default stop state for scan.
|
static boolean |
newInstructionRegister
Whether the two most signifcant bits of the instruction register encode
readEnable and writeEnable . |
logicOutput, printInfo
Constructor and Description |
---|
NetscanGeneric() |
Modifier and Type | Method and Description |
---|---|
protected abstract int |
hw_net_scan_dr(int numBits,
short[] scanIn,
short[] scanOut)
Write the bits
scanIn to the JTAG controller's data
register, and read back the bits scanOut . |
protected abstract int |
hw_net_scan_ir(int numBits,
short[] scanIn,
short[] scanOut,
int drBits)
Write the bits
scanIn to the JTAG controller's instruction
register. |
protected static void |
incrementNumTesters()
Should be called by any Netscan subclass constructors.
|
static void |
main(java.lang.String[] args)
Unit test.
|
static BitVector |
padBitVector(BitVector bits,
int numPre,
int numPost)
Pad a bit vector with a number of 0 bits at the beginning and end
of the vector.
|
protected static java.lang.String |
shortsToString(short[] shorts)
Debugging method prints array of shorts in reverse order.
|
isScanOutInverted, reset, setScanOutInverted, tms_reset
isLogInits, isLogOthers, isLogSets, logInit, logOther, logSet, setAllLogging, setLogInits, setLogOthers, setLogSets, toString
public static final short DEFAULT_STOP_STATE
public static final boolean newInstructionRegister
readEnable
and writeEnable
.protected abstract int hw_net_scan_ir(int numBits, short[] scanIn, short[] scanOut, int drBits)
scanIn
to the JTAG controller's instruction
register. The first bit scanned in to the chip is the LSB of
scanIn[0]
, and the first bit scanned out from the chip is
the LSB of scanOut[0]
.numBits
- The number of bits to shiftscanIn
- Bit sequence to write to instruction registerscanOut
- Bits scanned out of instruction registerdrBits
- Number of bits in the selected chainprotected abstract int hw_net_scan_dr(int numBits, short[] scanIn, short[] scanOut)
scanIn
to the JTAG controller's data
register, and read back the bits scanOut
. The first bit
scanned in to the chip is the LSB of scanIn[0]
, and the
first bit scanned out from the chip is the LSB of scanOut[0]
.
Extracted from netScan_DR to simplify overriding for different hardware,
e.g., in class Netscan4
.
numBits
- The number of bits to shiftscanIn
- Bit sequence to write to data registerscanOut
- Bits scanned out of data registerprotected static void incrementNumTesters()
protected static java.lang.String shortsToString(short[] shorts)
In other words, the left-to-right order of the bits is the same as in
BitVector
and in the XML file--but the user may need to
ignore some initial zero bits that do not correspond to any chain
elements.
public static BitVector padBitVector(BitVector bits, int numPre, int numPost)
bits
- the original bit vectornumPre
- the number of 0 bits to prependnumPost
- the number of 0 bits to postpendpublic static void main(java.lang.String[] args)