See: Description
Interface | Description |
---|---|
BERT |
Interface for a HP81250 Bit Error Rate Tester.
|
BERT.DataAnalyzer |
A Data Analyzer is a terminal that acquires/analyzes data.
|
BERT.DataGenerator |
A Data Generator is a terminal that generates data
|
BERT.DataModule |
A Data Generator/Analyzer Module.
|
BERT.Terminal |
A Terminal drives or reads a signal to or from a
chip.
|
BussedIO | |
ChainNode.ShiftListener | |
ChipModel |
The ChipModel is meant to abstract the underlying device under test.
|
CurrentReadable |
Device-independent interface to something (e.g., power supply or digitial
multimeter) that can read back current
|
EquipmentInterface |
Equipment implements only a GPIB equipment.
|
LogicSettable |
Generic interface for setting logic levels for outputs to chip
|
VoltageReadable |
Device-independent interface to something (e.g., power supply or
digitial multimeter) that can read back voltage
|
Class | Description |
---|---|
Agilent34970AChannel |
Class for reading a voltage level on a single channel of an Agilent 34970A
data acquisition/switch unit.
|
Agilent6031A |
This class extends the generic equipment class to include methods specific to
the Agilent 6031A 20V/120A single-channel power supply.
|
Agilent6031AChannel |
Class for setting a voltage level supplied by an Agilent 6031A 20V/120A
programmable DC power supply, using the device-independent interface
PowerChannel . |
AmpsVsVolts |
Measures current as a function of voltage, writing results to file.
|
BERT.SignalMode | |
BERT.StringComparator | |
BitVector |
Provides a fixed-length bit vector and methods for acting on it.
|
BypassJtagTester |
Parent class for simulation jtag testers.
|
ChainControl |
Main API for scan chain programming, provides control of a single port on a
JTAG tester.
|
ChainControlFake |
Create a fake Chain Control when no XML file is available.
|
ChainG |
ChainG, chain utility in GUI.
|
ChainNode |
Represents an entire scan chain, covering all of the scan chain elements at a
single address on the chip's JTAG controller.
|
ChainNodeDuplicate |
Wraps an existing ChainNode with this class to create a duplicate chain node that
is backed with the same data as the original ChainNode.
|
ChainTest |
Class provides various methods for testing scan chains, including generation
of Schmoo plots and verification of scan chain lengths.
|
CompareXML |
"Diff" facility for scan chain XML files, to simplify verification of
modifications to an XML file.
|
Equipment |
Device-independent control of a piece of experimental equipment over GPIB.
|
f206 | |
HP34401A |
API for controlling the HP 34401A digital multimeter.
|
HP548xxA |
API for controlling Agilent 5485xA oscilloscopes.
|
HP6624A |
This class extends the generic equipment class to include methods specific to
the HP6624A 4-channel power supply.
|
HP6624AChannel |
Class for setting a voltage level supplied by a single channel of an HP 6624A
programmable DC power supply, using the device-independent interface
PowerChannel . |
HP80000 | |
HP81250 | |
HsimModel | |
IndirectSet |
Adjusts voltage on a provided power supply channel until the specified
current reaches the desired set point.
|
Infrastructure |
Convenience methods for Async test software, including error-printing
routines, a timed wait facility, and methods to obtain
String
input from the user. |
JtagLogicLevel |
Settable logic level provided by a single pin on one port of a JTAG tester.
|
JtagSubchainTesterModel | |
JtagTester |
Device-independent control of a single port on a JTAG tester.
|
JtagTesterModel | |
Logger |
Provides user-configurable diagnostic messages to device classes that extend
this class.
|
LogicLevel |
Class for setting Vdd and a logic level on a chip, when both values are
provided by power supplies.
|
ManualPowerChannel |
Simple class for setting a power supply channel, when the voltage is supplied
by a manually-controlled DC power supply.
|
MockJtag |
Mock up of the control of a
Netscan JTAG tester, allows
simulated execution of test software even in the absence of a chip. |
MyChartFrame | |
MyTreeNode |
Default node class for chip-testing hierarchical data structures.
|
MyTreeNode.ChildEnumerator | |
Name |
A Name is a text-parsing object for port, node and arc names.
|
NanosimBERT | |
NanosimBERT.Event |
An Event to send to the Nanosim Simulator,
the same as the BERT would transition a signal
and send that to the real chip.
|
NanosimBERT.NanosimDataModule | |
NanosimBERT.NanosimTerminal | |
NanosimDataAnalyzer | |
NanosimDataGen | |
NanosimJtag |
Parent class for
NanosimJtagTester and NanosimJtagSubchainTester . |
NanosimJtagSubchainTester |
Control a section of a scan chain
|
NanosimJtagTester | |
NanosimLogicSettable | |
NanosimModel | |
Netscan |
Initialization, configuration, and connection API for Corelis NET-1149.1/E
one-port boundary scan controller (JTAG tester device).
|
Netscan4 |
Connection and reset API for a single port on the Corelis NETUSB-1149.1/E
four-port boundary scan controller (JTAG tester device).
|
NetscanGeneric |
Generic initialization, configuration, and connection API for Corelis
boundary scan controllers (JTAG testers).
|
PowerChannel |
Abstract class allowing generic control of a single power supply channel,
independent of the nature of the power supply.
|
PowerChannelResistorVoltageReadable |
Assuming you have a PowerChannel with a resistor attached to the
output and a VoltageReadable across the resistor, this will act
like a PowerChannel+CurrentReadable that lets you set the voltage
across the load as long as it maintains a reasonably stable current
draw.
|
Pst3202Channel |
Class for setting a voltage level supplied by a single channel of an Instek
PST-3202 programmable DC power supply, using the device-independent interface
PowerChannel . |
ResistorCurrent |
Infers current through a resistor from a voltage measurement, implements
CurrentReadable . |
SamplerControl |
Main API for sampler programming and calibration.
|
ScanChainXML |
User: gainsley
Date: Nov 15, 2005
|
ScanChainXML.StarterByOpcodeCompare | |
Signalyzer | |
SiliconChip | |
SimpleBus |
Create an object for a bus of signals.
|
SimulationModel |
Defines a model that replaces the actual chip (device under test).
|
SocketEquipment |
For equipment that communicates via socket interface.
|
SubchainNode |
Represent a single node of a scan chain.
|
SubchainNode.DataNet | |
T2500 | |
TextUtils |
This class is a collection of text utilities.
|
VerilogJtagSubchainTester |
Control a section of a scan chain
|
VerilogJtagTester |
A JtagTester that interfaces with a verilog model of the Device Under Test.
|
VerilogLogicSettable |
A Logic Settable device that interfaces with a verilog simulation.
|
VerilogModel |
Create a Verilog Model that simulates the behavior of a Device Under Test.
|
VerilogParser |
A brain-dead, extremely limited verilog parser.
|
VerilogParser.Module |
A Verilog Module.
|
VerilogParser.Port |
A Verilog port.
|
NetUSB.a libgpibenet.so netesfl.h NetUSB.h libnetesfl.a ugpib.hAside from that, this directory contains everything that used to be in the com.sun.electric.tool.simulation.test repository.
-------------------------------------------------- README for the Async group chip test software library. by Tom O'Neill -------------------------------------------------- Important paths: /import/async/cad/cvs/test - CVS source tree /import/async/cad/test - compiled code /import/async/cad/test/doc - compiled javadoc Documentation in Archivist: "The Scan Chain XML File Format (Version 2)" by Tom O'Neill, SML #2005-0382. "Using the Chip Test Software Library (Version 2)" by Tom O'Neill, SML #2005-0384. The documentation for the test software consists of the javadoc and the Archivist documents mentioned above. This file lists changes that haven't made it into the Archivist documents yet. ############### ERRATA FOR "The Scan Chain XML File Format (Version 2)" (None yet.) ############### ERRATA FOR "Using the Chip Test Software Library (Version 2)" (None yet.)
% java com.sun.electric.tool.simulation.test.ChainG heater.xml
Proposed changes to test library: 1. Move member gpibControllers from Infrastructure to Equipment, and encapsulate it. 2. Add a CurrentSource class, which IndirectSet would be an example of. Current-controlled power supply channels should work there too. 3. Replace Infrastructure.fatal() with unchecked exceptions so that the caller can choose to recover if it wants to. 4. Use the same resolution-control model for readCurrent() as for readVoltage() in HP34401A. 5. Make Agilent34970A look more like HP34401A. Maybe they could share a parent, with HP34401A having a fake channel? 6. Use Equipment.readFloat() instead of explicit code whenever possible. 7. Change floating-point values from type float to type double? 8. In Pst3202, don't wait 100s after each command. Instead, delay each command until it is at least 100 ms after the previous. 9. Optimize shift()? Right now the JNI calls dominate the time. If this is still the case when the JTAG controller is on a local net with the host, then there is not much we can do about the shift speed.
/* ConfigureXML.bsh */ /** * Returns a configured ScanChainXML object, with standard * scan chain elements and JTAG controller name defined. The * user should not need to call addScanChainElement() * or setJtagController() unless it needs to override * one of these settings. E.g., this method assumes * the JTAG controller has 8 instruction register bits. * * NOTE!!! You need to load your chip into Electric before you * run this script * * To use this, your chip-specific bean shell script should * include the following: * * import com.sun.electric.tool.io.output.ScanChainXML; * addClassPath("/home/toneill/eclipse/"); * importCommands("/test"); * gen = configureXML(); * * Your script must then call gen.setChipName(), .addJtagPort(), * .addCellToFlatten(), .setOutput(), and .start() as * appropriate for your chip. */ import com.sun.electric.tool.io.output.ScanChainXML; configureXML() { ScanChainXML gen = new ScanChainXML(); // Add all the scan chain elements: name, access, clears, // scan in port name, scan out port name gen.addScanChainElement("scanBB", "RWS", "-", "sin", "sout"); gen.addScanChainElement("scanBBbuf", "RWS", "-", "sin", "sout"); gen.addScanChainElement("scanBBronly", "R", "-", "sin", "sout"); gen.addScanChainElement("scanBS", "RW", "-", "sin", "sout"); gen.addScanChainElement("scanCH", "R", "H", "sin", "sout"); gen.addScanChainElement("scanCL", "R", "L", "sin", "sout"); gen.addScanChainElement("scanCount", "R", "-", "sin", "sout"); gen.addScanChainElement("scanDK_fix", "RW", "-", "sin", "sout"); gen.addScanChainElement("scanDK_xCouple", "RW", "-", "sin", "sout"); gen.addScanChainElement("scanRWH", "RWS", "H", "sin", "sout"); gen.addScanChainElement("scanRWL", "RWS", "L", "sin", "sout"); gen.addScanChainElement("scanDK", "RWS", "-", "sin", "sout"); // Add all the pass through elements: these pass scan data through, // like inverters or buffers: name, in port name, out port name gen.addPassThroughCell("scanAmp1", "in", "out"); gen.addPassThroughCell("scanAmp2", "in", "out"); gen.addPassThroughCell("jtagBuf", "jtag[1]", "jtag_1[1]"); gen.addPassThroughCell("jtagBuf", "jtag_1[8]", "jtag[8]"); // Define the jtag controller by it's library, cell name, // and the number of instruction register bits gen.setJtagController("jtag", "jtagCentral{sch}", 8); return gen; }
# Makefile # # Compiles the com.sun.electric.tool.simulation.test package into test.jar. # # To reduce the file count, libtest.so contains as much of the native code # as possible. The Netscan libraries had to be kept out, though, to # prevent conflicts between the various Corelis libraries. And I couldn't # figure out how to roll libgpibenet.so into libtest.so. # # Thus the following are required to run the software: # test.jar, libtest.so, libgpibenet.so, and # at least one of: libNetscanJNI.so, libNetscan4JNI.so # ## Modified 21 Jul 2008 to compile as 32-bit binaries under 64-bit Linux (replaced Javamake with javac) JKG #JAVA32BIT = /proj/async/cad/linux/lib/j2sdk_1_4_2_nb/j2sdk1.4.2 JAVA32BIT = /import/async/cad/linux/lib/jdk1.5/ JAVADIR = $(JAVA32BIT) JAVA = $(JAVADIR)/bin/java JAVAC = $(JAVADIR)/bin/javac JAVAH = $(JAVADIR)/bin/javah JAVADOC = $(JAVADIR)/bin/javadoc JAVAR = $(JAVADIR)/bin/jar CFLAGS = -m32 -g DOCDIR = ./doc BASEDIR = com/sun/async/test/ PACKAGE = com.sun.electric.tool.simulation.test WRAP_PREFIX = com_sun_electric_tool_simulation_test MAIN = miniHeater JARFILE = test.jar INP_JARFILES = ./jfreechart.jar:./jcommon.jar # Files associated with JNI wrappers # WRAP_NAME = $(PACKAGE).NetscanJNI $(PACKAGE).NetscanJNI4 $(PACKAGE).GPIB #WRAP_CLASS = $(BASEDIR)/NetscanJNI.class \ # $(BASEDIR)/NetscanJNI4.class $(BASEDIR)/GPIB.class #WRAP_HDR = com_sun_electric_tool_simulation_test_NetscanJNI.h \ # com_sun_electric_tool_simulation_test_NetscanJNI4.h com_sun_electric_tool_simulation_test_GPIB.h #WRAP_OBJ = NetscanJNI.o NetscanJNI4.o GPIB.o WRAP = GPIB WRAP2 = NetscanJNI WRAP3 = Netscan4JNI WRAP_OBJ = $(WRAP).o $(WRAP2).o $(WRAP3).o # Compilation performed by javamake.jar. Use -C-g to pass the # -g debug flag to the compiler. JAVAMAKE = $(JAVAC) -g .PHONY : all javamake run doc clean all: $(JARFILE) libtest.so lib$(WRAP2).so lib$(WRAP3).so javamake: $(JAVAMAKE) -classpath .:$(INP_JARFILES) $(BASEDIR)/*.java # Generate jar file $(JARFILE): javamake echo "Main-Class: com.sun.electric.tool.simulation.test.ChainG" > my_manifest;\ $(JAVAR) cmf my_manifest $(JARFILE) $(BASEDIR)/*.class $(BASEDIR)/*.v $(BASEDIR)/*.dtd; \ rm -f my_manifest # Generate wrapper headers (Netscan.h, GPIB.H) $(WRAP_PREFIX)_%.h: $(BASEDIR)/%.class $(JAVAH) -jni $(PACKAGE).$* # Generate wrapper objects (Netscan.o, GPIB.o) $(WRAP_OBJ): %.o: %.c $(WRAP_PREFIX)_%.h gcc $(CFLAGS) -I$(JAVADIR)/include/ -I$(JAVADIR)/include/linux/ \ -c $< # Generate libtest.so from as many .o and .a files as possible # (currently all .a files have to appear separately) libtest.so: $(WRAP).o gcc $(CFLAGS) $(WRAP).o libgpibenet.so -shared -o libtest.so # Generate the libNetscanJNI.so, the lib for the 1-port JTAG tester lib$(WRAP2).so: $(WRAP_PREFIX)_$(WRAP2).h $(WRAP2).o libnetesfl.a gcc $(CFLAGS) $(WRAP2).o libnetesfl.a -shared -o lib$(WRAP2).so # Generate the libNetscan4JNI.so, the lib for the 4-port JTAG tester lib$(WRAP3).so: $(WRAP_PREFIX)_$(WRAP3).h $(WRAP3).o NetUSB.a gcc $(CFLAGS) $(WRAP3).o NetUSB.a -lusb -shared -o lib$(WRAP3).so run : all echo "NOTE: If you get java.lang.UnsatisfiedLinkError, add '.' to your LD_LIBRARY_PATH. In csh, do 'setenv LD_LIBRARY_PATH .:$$LD_LIBRARY_PATH'" $(JAVA) $(MAIN) doc: rm -rf $(DOCDIR)/* $(JAVADOC) $(BASEDIR)/*.java -d $(DOCDIR) clean : rm $(BASEDIR)/*.class libtest.so $(JARFILE) $(WRAP_OBJ) \ $(WRAP_PREFIX)_$(WRAP).h \ $(WRAP_PREFIX)_$(WRAP2).h lib$(WRAP2).so \ $(WRAP_PREFIX)_$(WRAP3).h lib$(WRAP3).so